A grinding-based manufacturing method for silicon wafers: decomposition analysis of wafer surfaces


It is difficult for the lapping-based manufacturing method currently used to manufacture the majority of silicon wafers to meet the ever-increasing demand for flatter wafers at lower costs. A grinding-based manufacturing method for silicon wafers has been investigated. It has been demonstrated that the site flatness on the ground wafers (except for a few sites at the wafer center) could meet the stringent specifications for future silicon wafers. The generation mechanisms of the dimples and bumps in the central areas on ground wafers have also been studied. This paper reports another study on the grinding-based method, aiming to reduce the cost of chemical-mechanical polishing – the final material removal process in manufacturing of silicon wafers. Using design of experiments, investigations were carried out to understand the influences of grinding process variables on the peak-to-valley values of the polished wafer surfaces. It was found that the peak-to-valley values over the entire wafer surfaces did not show any relationship with grinding process variables. However, after analyzing the surface profiles by decomposing them into different frequencies, it was observed that there is a correlation between grinding process variables and certain surface feature components. Based on this finding, it is recommended to optimize the grinding process variables by minimizing the peak-to-valley values for each surface feature component, one at a time. This methodology has not been published for wafer grinding and is of practical use to the wafer industry.



Grinding, Machining, Manufacturing, Polishing, Semiconductor material, Silicon wafer, Surface roughness