Cryogenic temperature characteristics of bulk silicon and Silicon-on-Sapphire devices - Melton, Steven Allen (Kansas State University, 2012)
Studies of Silicon-on-Sapphire (SOS) CMOS device operation in cryogenic environments are presented. The main focus was to observe the characteristic changes in high, medium and low threshold SOS NFETs as well as SOS silicide blocked (SN) resistors when the operational temperature is in the devices’ freeze-out range below 77 Kelvin. The measurements taken will be useful to any integrated circuit (IC) designer creating devices based on an SOS process intended to operate in cryogenic environments such as superconducting electronics and planetary probes. First, a 1N4001 rectifier and a 2N7000 NFET were tested to see how freeze-out effects standard diode and MOS devices. These devices were tested to see if the measurement setup could induce carrier freeze-out. Next, SOS devices were studied. Data was collected at room temperature and as low as 5 Kelvin to observe resistance changes in an SN resistor and kink effect, threshold voltage shifts and current level changes in transistors. A 2μm high threshold NFET was tested at room temperature, 50 Kelvin, 30 Kelvin and 5 Kelvin to observe effects on I-V curves at different temperatures with-in the freeze-out range. A 2μm medium threshold NFET was tested down to 56 Kelvin to see if the behavior is similar to the high threshold FET. A 2μm intrinsic, or low threshold, NFET was also tested with the assumption it would be the most susceptible to carrier freeze-out. All of the devices were found to behave well with only mild effects noted.
Keywords: Cryogenic; Silicon-on-insulator; Kink effect; Electrical Engineering (0544)