Noise characterization of transistors in 0.25μm and 0.5μm silicon-on-sapphire processes

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dc.contributor.author Albers, Keith Burton
dc.date.accessioned 2011-02-08T14:53:29Z
dc.date.available 2011-02-08T14:53:29Z
dc.date.issued 2011-02-08
dc.identifier.uri http://hdl.handle.net/2097/7137
dc.description.abstract A technique for measuring and characterizing transistor noise is presented. The primary goal of the measurements is to locate the 1/f noise corner for select transistors in Silicon-on-Sapphire processes. Additionally, the magnitude of the background channel noise of each transistor is measured. With this data, integrated circuit (IC) engineers will have a qualitative and quantitative resource for selecting transistors in designs with low noise requirements. During tests, transistor noise behavioral change is investigated over varying channel lengths, device type (N-type and P-type), threshold voltage, and bias voltage levels. Noise improvements for increased channel lengths from minimal, 1.0μm, and 4.0μm are measured. Transistors with medium and high threshold voltages are tested for comparison of their noise performance. The bias voltages are chosen to represent typical design values used in practice, with approximately 400 mV overdrive and a drain-to-source voltage range of 0.5 to 3.0V. The transistors subjected to tests are custom designed in Peregrine’s 0.5μm (FC) and 0.25μm (GC) Silicon-on-Sapphire (SOS) processes. In order to allow channel current noise to dominate over other circuit noise, the transistors have extraordinarily large aspect ratios (~2500 - 5000). The transistor noise produced is amplified and measured over a frequency range of 1kHz - 100MHz. This range allows the measurement of each device’s low and high frequency noise spectrum and resulting noise corner. en_US
dc.language.iso en_US en_US
dc.publisher Kansas State University en
dc.subject Flicker noise en_US
dc.subject Transistor noise corner en_US
dc.subject Generation-Recombination noise en_US
dc.subject Silicon-on-Sapphire en_US
dc.subject Fully depleted en_US
dc.title Noise characterization of transistors in 0.25μm and 0.5μm silicon-on-sapphire processes en_US
dc.type Thesis en_US
dc.description.degree Master of Science en_US
dc.description.level Masters en_US
dc.description.department Department of Electrical and Computer Engineering en_US
dc.description.advisor William B. Kuhn en_US
dc.subject.umi Engineering, Electronics and Electrical (0544) en_US
dc.date.published 2010 en_US
dc.date.graduationmonth May en_US


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