ELID grinding of silicon wafers: a literature review

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dc.contributor.author Liu, J. H.
dc.contributor.author Pei, Zhijian J.
dc.contributor.author Fisher, Graham R.
dc.date.accessioned 2009-11-25T22:13:07Z
dc.date.available 2009-11-25T22:13:07Z
dc.date.issued 2009-11-25T22:13:07Z
dc.identifier.uri http://hdl.handle.net/2097/2192
dc.description.abstract Silicon wafers are the most widely used substrates for fabricating integrated circuits. There have been continuous demands for higher quality silicon wafers with lower prices, and it becomes more and more difficult to meet these demands using current manufacturing processes. In recent years, research has been done on electrolytic in-process dressing (ELID) grinding of silicon wafers to explore its potential to become a viable manufacturing process. This paper reviews the literature on ELID grinding, covering its set-ups, wheel dressing mechanism, and experimental results. It also discusses the technical barriers that have to be overcome before ELID grinding can be used in manufacturing. en_US
dc.relation.uri http://www.elsevier.com/wps/find/journaldescription.cws_home/264/description#description en_US
dc.subject Electrolytic in-process dressing en_US
dc.subject Grinding en_US
dc.subject Machining en_US
dc.subject Semiconductor material en_US
dc.subject Silicon wafer en_US
dc.title ELID grinding of silicon wafers: a literature review en_US
dc.type Article (author version) en_US
dc.date.published 2007 en_US
dc.citation.epage 536 en_US
dc.citation.issue 3-4 en_US
dc.citation.jtitle International Journal of Machine Tools and Manufacture en_US
dc.citation.spage 529 en_US
dc.citation.volume 47 en_US
dc.contributor.authoreid zpei en_US

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