Integrated UHF CMOS power amplifiers in silicon on insulator process

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dc.contributor.author Jeon, Jeongmin
dc.date.accessioned 2009-09-03T17:02:59Z
dc.date.available 2009-09-03T17:02:59Z
dc.date.issued 2009-09-03T17:02:59Z
dc.identifier.uri http://hdl.handle.net/2097/1703
dc.description.abstract Design challenges and solution methods for Watt-level UHF CMOS power amplifiers are presented. Using the methods, a fully-integrated UHF (400MHz) CMOS power amplifier (PA) with more than 1-Watt output is demonstrated for the first time in Silicon on Sapphire (SOS) process. The design techniques are extended for a two-stage five-chip 5-Watt CMOS PA. In the 1-Watt PA, a differential stacked PMOS structure with floating-bias and a 1:3 turns-ratio output transformer are chosen to overcome low breakdown voltage (Vbk) of CMOS and chip area consumption issues at UHF frequencies. The high Q on-chip transformer on sapphire substrate enables the differential PA to drive a single-ended antenna effectively at 400 MHz. The PA is designed for a surface-to-orbit proximity link microtransceiver, used on Mars exploration rovers, aerobots and small networked landers. In a standard package the PA delivers 30 dBm output with 27 % PAE. No performance degradation was observed in continuous wave (CW) operation with various output terminations and the PA was tested to 136 % of its nominal 3.3 V supply without failure. Stability analysis and measurements show that the PA is stable in normal operation. It is also shown that the PA is thermally reliable. In the microtransceiver circuits, the PA works in conjunction with transmit/receive (TR) switch to allow nearly the full 1-Watt to reach the antenna. The 1-Watt PA design is also leveraged to demonstrate a power-combined two-stage five-chip PA. The 1-Watt PA’s output balun is modified for the four-transformer combining. Four identical chips are wire-bonded in the output stage and the fifth identical chip is added as a drive-amplifier. Despite low efficiency due to damaged bias circuits, the PA provides 5-Watt output power (37 dBm) at 480 MHz with 17 % PAE with 17 dB gain. The PA layout is carried out considering full integration on a 7×10mm2 die. It will be the highest output CMOS PA ever reported once the full integration is implemented. The research contributes to state of the art by developing design-techniques for a TR switch and PAs on SOS process. The resonant TR switch technique is applied to a full transceiver and the multi turns-ratio on-chip transformer is used in PA’s output matching network for the first time. The PA design is also extended to the 5-Watt PA, demonstrating the highest output power in CMOS process. en_US
dc.language.iso en_US en_US
dc.publisher Kansas State University en
dc.subject CMOS en_US
dc.subject Power amplifier en_US
dc.subject UHF en_US
dc.subject RF en_US
dc.title Integrated UHF CMOS power amplifiers in silicon on insulator process en_US
dc.type Dissertation en_US
dc.description.degree Doctor of Philosophy en_US
dc.description.level Doctoral en_US
dc.description.department Department of Electrical and Computer Engineering en_US
dc.description.advisor William B. Kuhn en_US
dc.subject.umi Engineering, Electronics and Electrical (0544) en_US
dc.date.published 2008 en_US
dc.date.graduationmonth December en_US

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